Inabilities of computer logic

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Inabilities of computer logic

Post by Reactor » December 16th, 2014, 3:26 pm

The mathematical logic used in computers can not simply specify or verify the "nuts and bolts" concepts of PHYSICAL PROCESS. This is true wherever computational devices are used, even in machine control.

For example, how does one perform: CAUSE, EFFECT, BEGINS, ENDS, OVERLAPS IN TIME, PERSISTS, or REPEATS in any common logic?

And does anyone know why this is true?

Or can refute this claim?

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Re: Inabilities of computer logic

Post by Scott » December 18th, 2014, 11:39 pm

Reactor wrote:And does anyone know why this is true?

Or can refute this claim?
Shifting the burden of proof fallacy.
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Re: Inabilities of computer logic

Post by Reactor » December 20th, 2014, 3:53 am

These are temporal concepts. Common logic is a spatial tool, see Turing’s theoretical machine for shuffling symbols around and its “endless tape.” These concepts are needed for concise, native language, process control, but are difficult to implement in Boolean-sequential systems. In a common logic and computational system:

“Cause”is not understandable because the logic does not recognize cause, so the system has to take the given, whatever it is served.

“Effects” are not recognized because an effect does not exist when the system is not observing it, and it cannot look at more than one or two things at a time. All those “effects” that have occurred during a process are “out of sight and mind.”

“Before” or “after” does not exist unless the events were recorded with time stamps and the relationships must be worked out with arithmetic procedures, then may be tagged or labeled for future reference.

“Begins,” “continues,” “ends,” and “overlaps” means little unless the process is looked at in hindsight, with time stamps or labels on the events and conditions to let the system know the order and conditions of the occurrences, perhaps with models for comparison.

“Continues” or “persists” are meaningless in a static, frame-bound world, an environment populated with snapshots.

“Repeat(ed)” may be understood as “go (went) back to point x and do (did) it all again.”

“Concurrent” means “scheduled to meet deadlines,” not at all the same meaning as “processes that can or do happen over the same period of time.”

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Re: Inabilities of computer logic

Post by Greta » December 20th, 2014, 4:25 am

Reactor wrote:The mathematical logic used in computers can not simply specify or verify the "nuts and bolts" concepts of PHYSICAL PROCESS. This is true wherever computational devices are used, even in machine control.

For example, how does one perform: CAUSE, EFFECT, BEGINS, ENDS, OVERLAPS IN TIME, PERSISTS, or REPEATS in any common logic?
My first thought is that those phenomena are algorithmic in nature. Most of those items would be easy to program - but there is seemingly no limit to the potential complexity of cause and effect.

Given that the physical world is "in analogue", digital representation will always be approximate, although extremely accurate.
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Re: Inabilities of computer logic

Post by MidiChlorian » December 20th, 2014, 12:05 pm

Reactor wrote:The mathematical logic used in computers can not simply specify or verify the "nuts and bolts" concepts of PHYSICAL PROCESS. This is true wherever computational devices are used, even in machine control.

For example, how does one perform: CAUSE, EFFECT, BEGINS, ENDS, OVERLAPS IN TIME, PERSISTS, or REPEATS in any common logic?

And does anyone know why this is true?

Or can refute this claim?
Reactor, in your first statement or sentence above is somewhat false, in that the CPU of a computer only reacts to the program logic, which is written by programmers who may fail to understand the CPU's ability to process specific commands which are subject to the operating system it would function under or through. It is the program or sub-programs which would require the ability to execute that which you present in your "For example," statement. Therefore, your last two questions must always lead back to the logic which the programmer uses to present the need which a program has been created to perform, which ultimately begins and ends with a purpose. This purpose is dependent on the need for its creation and is no better or worse that the logic presented by the programs creator.

Thereby, the "Inabilities of computer Logic" is not subject to the computer but the program and the programmer's understanding of Logic.
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Re: Inabilities of computer logic

Post by Reactor » December 21st, 2014, 1:03 pm

Expertise in programming is one thing, but a programmer is limited in what can be done. He/she must stick to the concepts that are supported in the computer language and those constructions that can be built using the allowed logic operations and functions.

In computers, there are only two primitive logic operations that are necessary and sufficient, in combination, to perform the 16 possible static Boolean operations between two operands. Those being: AND, a conjunction, and NOT, the operator of negation, an adverb. They can be used or combined to perform logical AND, NOT, NAND, OR, NOR, XOR, XNOR, as well as equate to certainty (1), and null (0). The set can also be used to perform binary arithmetic. All of these operations are conjunctive, or coincident, in both space and time. “A AND B” is true if both "A" and "B" are present at one and the same time.

The Boolean operators can be combined with STORE, the memory operator, to form counters and storage registers, state-machines, arithmetic-logic units, microprocessors, and such.

When performed by physical logic elements, these operations are considered to be executed in a null-time zone. The evaluations are available at the next live moment (usually at the next clock pulse or instruction), which is designed to occur after any contributing settling times or gate-delays have run to completion.

Boolean logic used in such a manner is static, is unobservant of change, and can be said to inhabit the space-domain. The time-domain is an untapped resource.

It my opinion, all Boolean-sequential languages are sparse and are limited to the space-domain. They perform in the time domain at the user’s peril. We can talk about concurrent processing, but there are only linear-sequential processors at the bottom of the latest computational machine, no matter what it is called.

My system of reactive logic (RL) has 11 fundamental operators and 56 functions that perform in the space, time, and (joint) space-time domains. The RL language is not a computer language. (All computer languages have the limitations that are caused by the computational method.) RL can be used to design and construct machines that respond in parallel-concurrent fashion.

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Re: Inabilities of computer logic

Post by MidiChlorian » December 21st, 2014, 8:32 pm

Reactor wrote:Expertise in programming is one thing, but a programmer is limited in what can be done. He/she must stick to the concepts that are supported in the computer language and those constructions that can be built using the allowed logic operations and functions.
Your argument is true in the sense that many program languages have limitations, and that todays programmers have little understanding of the ability and limitations of the hardware for which they are programming, however this can be partially overcome by a better basic understanding of the lower level languages like assembly language, which also is dependent on corresponding newer or more advanced processors, which would require constant upgrades to their corresponding assembly language syntax to match operation and function. Many higher level languages do not have the ability to integrate lower level language access, in order to ascertain the various hardware functionality, which does cause problems in performance and functional ability.
Reactor wrote:In computers, there are only two primitive logic operations that are necessary and sufficient, in combination, to perform the 16 possible static Boolean operations between two operands. Those being: AND, a conjunction, and NOT, the operator of negation, an adverb. They can be used or combined to perform logical AND, NOT, NAND, OR, NOR, XOR, XNOR, as well as equate to certainty (1), and null (0). The set can also be used to perform binary arithmetic. All of these operations are conjunctive, or coincident, in both space and time. “A AND B” is true if both "A" and "B" are present at one and the same time.
Granted, there are basic Boolean operations but, your narration above which I have underlined is not clear, as to the context, where "space" if referring to capacity or memory, is not necessarily relative to "time", as you present the statement, where that which follows has little meaning in that which is sequential or serial, would not be "present at one and the same time" unless placed in dynamic storage for future use.
Reactor wrote:The Boolean operators can be combined with STORE, the memory operator, to form counters and storage registers, state-machines, arithmetic-logic units, microprocessors, and such.
I'm not quite sure as to what you are attempting to present above by your grammatical usage of some of these terms which have some but little relations where some are hardware and others BIOS functionality, etc. ??
Reactor wrote:When performed by physical logic elements, these operations are considered to be executed in a null-time zone. The evaluations are available at the next live moment (usually at the next clock pulse or instruction), which is designed to occur after any contributing settling times or gate-delays have run to completion.
Can you explain what you mean by "null-time zone" where the remaining context, although there are terms which I understand but literally cannot determine exactly what you are attempting to say?
Reactor wrote:Boolean logic used in such a manner is static, is unobservant of change, and can be said to inhabit the space-domain. The time-domain is an untapped resource.

It my opinion, all Boolean-sequential languages are sparse and are limited to the space-domain. They perform in the time domain at the user’s peril. We can talk about concurrent processing, but there are only linear-sequential processors at the bottom of the latest computational machine, no matter what it is called.
Again your statement above does not make any real sense, could you explain "space-domain" and "time-domain", where how they relate to the body of your narration?
Reactor wrote:My system of reactive logic (RL) has 11 fundamental operators and 56 functions that perform in the space, time, and (joint) space-time domains. The RL language is not a computer language. (All computer languages have the limitations that are caused by the computational method.) RL can be used to design and construct machines that respond in parallel-concurrent fashion.
You mention "reactive logic (RL)", are you referring to Randomized Logarithmic-space (RL)? Also you state "RL language" and also refer to it not being "a computer language", but there is an RL which is used to access large databases to retrieve information, but has nothing to do with "design and construct machines that respond in parallel-concurrent fashion", can you be a little more specific?
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Re: Inabilities of computer logic

Post by Reactor » December 22nd, 2014, 3:02 pm

The substance of your questions, and others, are more fully explored in a book, soon to be published. For now, I will concentrate on explaining “space domain,” “time domain,” the phrase “at one and the same time,” and the concept of “null time.”

Only space and time need be considered as the background upon which events and conditions play. As an automation engineer investigating why there were so many Boolean logic elements but no temporal logic elements suitable for process control, I became familiar with operations in "space" and in "time." The discovery of certain “truths” led me to select particular terms to document my findings. Since Boolean logic was “contemporaneous” and it had little to do with time, it became “space domain” logic. Alternatively, “non-contemporaneous” became the class of temporal logic elements dealing directly with time for “time domain” logic. Then I found some logic operations that had the characteristics of both non-contemporaneous and contemporaneous logic. These became “partly non-contemporaneous, partly contemporaneous,” which was appropriate for “space-time domain” logic.

Contemporaneous (meaning occurring or existing at the same time) relationships exist between conditions at one or more locations in space AND the given time. A Boolean expression stating a contemporaneous relationship is only valid for conditions which coincide with the time of inspection, or operator or function execution. One could say that the characteristic features notable in a contemporaneous relationship are the spatial locations (A, B) and states (1, 0 ) of the conditions that are co-incident. Contemporaneous logic is non temporal because time is not a factor (contemporaneous relationships are valid at one and the same time). On that basis, contemporaneous logic is designated as the logic of spatial relations, Spatial Logic, or simply S-logic.

“Space domain” refers to contemporaneous relationships or operations, which, if they are logic operations, are most probably Boolean. If the contemporaneous operations involve transfer in space (say from memory or an external sensor to an ALU (arithmetic logic unit) there are no changes in values allowed during the transport. If the contemporaneous operation is a transformation, say exchanging some symbols for others, only the specified swapping may be performed (e.g., a new arrangement of alphabet characters for another attempt at decoding an encrypted message).

Non contemporaneous (meaning occurring or existing at different times) relationships exist between two or more events which are unique and which occur in a strictly non contemporaneous way, that is, in a sequence. Non contemporaneous relationships are valid for events, conditions, or their inceptions, which do not coincide in time. The feature which distinguishes non contemporaneous logic from its contemporaneous counterpart is that it is mediated by time. Hence non contemporaneous logic is Temporal Logic, time logic, or simply T-logic.

“Time domain” refers to the sphere in which non contemporaneous relationships can exist or those operations can be performed.

The purpose of software is to enable computation, which is essentially contemporaneous symbol manipulation. Software directs the spatial movements, transformation of, and operations upon, characters or character strings. Computation performs linear-sequential “space domain” treatment of all factors, including temporal cues and attributes. The present static, frame-based logic operations (but faster now via computers) are the same as was practiced long ago by ancient logicians and natural philosophers: spatial and temporal facts are taken out of the natural time-stream and placed in memory spaces, e.g., recorded on disk or written on papyrus. Those static facts are represented by symbols that must be translated and transformed in space to determine conclusions and solutions. All Boolean operations can be performed by consulting look-up tables, which are matrices in space.

The confinement of computation to static operations, i.e., when values of the operands do not change, requires all process events and conditions to be translated from the ongoing dynamic, real time-domain to the static frozen (artificial) space-domain—by sampling and storing values in memory. This practice enables the solely “spatial” operations (the logic of temporal coincidence, or contemporaneous logic) to be subsequently performed on those fixed values, but it greatly complicates the process management method. Conventional logic is constrained to represent everything via fixed information in frames. The results from static operations within or between those frames must finally be translated back into the natural time domain to perform physical process-control actions.

Because nothing happens (or nothing is supposed to happen, except for "settling") between frames, no time exists between those frames, or for that matter, between instructions or clock pulses, hence such intervals are “null time.”

My “RL” stands for "reactive logic," which my logic formulation is. Instead of being static, like every other computer logic, my logic and its operators and functions that are in the time domains are active. They react and exhibit behaviors according to the behaviors sensed or detected from the environment (physical processes to be monitored and controlled) or from events internal to the controller (failure modes detected). (The Boolean operators are also retained.)

Every logic operation or function in the language or in the symbolic algebra has a corresponding hardware logic element configuration in which the logic function specified is actually performed.

Hopefully, this further information helps.

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Re: Inabilities of computer logic

Post by MidiChlorian » December 22nd, 2014, 5:39 pm

Reactor wrote:The substance of your questions, and others, are more fully explored in a book, soon to be published. For now, I will concentrate on explaining “space domain,” “time domain,” the phrase “at one and the same time,” and the concept of “null time.”
[. . .]
“Time domain” refers to the sphere in which non contemporaneous relationships can exist or those operations can be performed.
[. . .]
Because nothing happens (or nothing is supposed to happen, except for "settling") between frames, no time exists between those frames, or for that matter, between instructions or clock pulses, hence such intervals are “null time.”

My “RL” stands for "reactive logic," which my logic formulation is. Instead of being static, like every other computer logic, my logic and its operators and functions that are in the time domains are active. They react and exhibit behaviors according to the behaviors sensed or detected from the environment (physical processes to be monitored and controlled) or from events internal to the controller (failure modes detected). (The Boolean operators are also retained.)

Every logic operation or function in the language or in the symbolic algebra has a corresponding hardware logic element configuration in which the logic function specified is actually performed.

Hopefully, this further information helps.
Yes, Reactor, your explanation, although some repeated, is helpful, however your OP and the topic title, might be more descriptive if one were associating it with a topic like AI (Artificial Intelligence), but the OP was generalized and was not that specific and might otherwise be concluded as being without purpose. Your notation, underlined above, might indicate, or at least my association there of, would assimilate to "Symbolic AI", however with your introducing and explanation of RL, might refer more to Chaotic Logic, or multi-intermingled-Causality which would then describe anti-logic, at least on an abstract level. Your explanation of "space domain" and "time domain" has helped but this was assuming that a "time domain" could be unified with a "space domain", if there were multiple domains within time frames, but I would be looking forward to the publication of this book you mentioned at the beginning of your reply.

Thank you in advance.
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Re: Inabilities of computer logic

Post by Londoner » December 23rd, 2014, 6:26 am

For example, how does one perform: CAUSE, EFFECT, BEGINS, ENDS, OVERLAPS IN TIME, PERSISTS, or REPEATS in any common logic?
I would suggest that the problem is that these terms do not denote anything specific, rather they describe a particular way of looking at an event, a subjective selective view, no more true or false than any other version.

For example, suppose we try to identify 'cause and effect'. They aren't is themselves objects in logic; we are not saying there is an extra thing 'cause' or 'effect' that exists separately from the things involved. We may say 'the moon causes the tides' but that is not to assert the existence of a separate 'cause' that is distinct from the moon. All we have done is draw attention to one aspect of the moon being the moon. Nor is it one distinct relationship. It would be equally valid if we had said 'gravity causes the tides' or 'the presence of liquid on the earth' or 'our distance from the sun' or 'the nature of molecular bonding' causes the tides, and so on until we have referenced everything in the universe as the 'cause of the tides'.

Similarly, 'time' is something we use to indicate the order of events, but (as with cause and effect) what we choose to single out as being an 'event' is our choice. It would be equally valid to choose to divide up 'events' differently, in which case different descriptions of 'time' would be true.

So I would say that the reason we can't work such things into logic is that they are neither true nor false.

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Re: Inabilities of computer logic

Post by Reactor » December 23rd, 2014, 1:41 pm

MidiChlorian,

Thanks for your kindly guidance.

Many have jumped on the AI (artificial intelligence) bandwagon without actually being AI or even helping AI, but to use it as a buzz-word for promotion. The fact that computers aid man’s labors is real, but the office has become automated, more so than the manufacturing floor. This is due to the costs of computation, its appropriate uses, and the form in which it can be most useful. The PC (personal computer) better fits the office vs. the factory floor. Managing the tools for handling data is easier for a computer (and those who operate computers) than managing machinists’ tools. Spilled coffee is just about the worst environmental hazard in the office vs. exposure to acidic or basic fluids, oil and grease, metal filings and dust, physical damage from heavy things in motion, etc. in manufacturing areas. The cost per unit of useful computation is much less for the office vs. in manufacturing.

My new system of reactive logic, IMHO, will become another part of the bedrock supporting automation, machine control, and yes, artificial intelligence (when AI is used for physical process control). Boolean logic is useful for the space domain, but is shackled to the linear-sequential paradigm. A reactive logic will serve the time domain, foundationally providing temporal awareness to machines in a non-computational way. In this non-computational method, time is treated directly, in the real (analog) time domain, as events happen and conditions change, vs. being treated after-the-fact via the space domain. (In the computational method, time is treated as space because there is no other way for computers to apprehend or reckon time.) My reactive logic provides a direct awareness of time that life has, but computers and computational methods do not possess. This method can be used within, without, or alongside computers.

The place where this new system of thought and practice can be most useful in the near term is in appliance and machine automation. It can grow from there to under-gird all of computer science, sharing that foundation on the same level as modern Boolean logic. It should be taught in secondary schools along with geometry, chemistry, and physics.

The book on this subject is close to being ready. I am hoping to publish before the end of the year.

-- Updated December 23rd, 2014, 1:11 pm to add the following --

Londoner,

Thank you, I appreciate your views on this developing subject matter.

In my view, these terms, which lead to essential operators in my system of logic, describe specific activities, actions, or behaviors that are significant events in physical processes. Common logic systems do not have dynamic logic operators with which to express dynamic behaviors. The fundamental operators of ordinary logic can only describe static states, not dynamic activities. Behavior emulation using standard logic is therefore limited to still frames stitched together with clock pulses or many lines of linear-sequential code (software) like a connect-the-dot drawing. Software is a means of directing a process controller—and the machine it controls—from one state to the next but requires one instruction or more for each step. That is why there are millions of lines of code in some programs.

Conventional logic systems can only recognize or perform operations that transform or translate values in space, which are matters of existence. (Either it exists or it does not. It exists as a T or a F or as some other value.) Ordinary logic treats time through the constraint of translating all temporal signs, signals, and effects into the space-domain, via sample-and-store, so as to be suitable for the space-only operations (e.g., Boolean) that are commonly available. Contemporary logic can easily assign state, but it is powerless to assign or recognize cause, because the essence of cause and effect is dynamic and operates over time, thus can not be fully captured in static states.

My system of logic operates within and upon the natural, dynamic, real, time domains.

I agree that some things “just are.” In my system, the attention is on what happens, dynamically. For example, this temporal operation is a primitive: “If (A first, then B is T), therefore (B first, then A is F).”

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Re: Inabilities of computer logic

Post by MidiChlorian » December 23rd, 2014, 4:54 pm

Londoner wrote:
For example, how does one perform: CAUSE, EFFECT, BEGINS, ENDS, OVERLAPS IN TIME, PERSISTS, or REPEATS in any common logic?
I would suggest that the problem is that these terms do not denote anything specific, rather they describe a particular way of looking at an event, a subjective selective view, no more true or false than any other version.
[ . . . ]
Similarly, 'time' is something we use to indicate the order of events, but (as with cause and effect) what we choose to single out as being an 'event' is our choice. It would be equally valid to choose to divide up 'events' differently, in which case different descriptions of 'time' would be true.

So I would say that the reason we can't work such things into logic is that they are neither true nor false.
Londoner, your argument is valid however, Reactor's reply to this, is also valid in that we can apply a certain amount of probability into the logic equation, where cause and effect, is never certain and controllable where the specific details of a cause may have multiple or chaotic effects, because the cause may take on additional time parameters which may only be analyzed by studying the effect for that specific cause based on the environment of space, where space and time may alter the possible effects.
Reactor wrote: Londoner,

Thank you, I appreciate your views on this developing subject matter.

In my view, these terms, which lead to essential operators in my system of logic, describe specific activities, actions, or behaviors that are significant events in physical processes. Common logic systems do not have dynamic logic operators with which to express dynamic behaviors. The fundamental operators of ordinary logic can only describe static states, not dynamic activities. Behavior emulation using standard logic is therefore limited to still frames stitched together with clock pulses or many lines of linear-sequential code (software) like a connect-the-dot drawing. Software is a means of directing a process controller—and the machine it controls—from one state to the next but requires one instruction or more for each step. That is why there are millions of lines of code in some programs.

Conventional logic systems can only recognize or perform operations that transform or translate values in space, which are matters of existence. (Either it exists or it does not. It exists as a T or a F or as some other value.) Ordinary logic treats time through the constraint of translating all temporal signs, signals, and effects into the space-domain, via sample-and-store, so as to be suitable for the space-only operations (e.g., Boolean) that are commonly available. Contemporary logic can easily assign state, but it is powerless to assign or recognize cause, because the essence of cause and effect is dynamic and operates over time, thus can not be fully captured in static states.

My system of logic operates within and upon the natural, dynamic, real, time domains.

I agree that some things “just are.” In my system, the attention is on what happens, dynamically. For example, this temporal operation is a primitive: “If (A first, then B is T), therefore (B first, then A is F).”
Where I can see the possibilities in Reactors premise, and that if one assumes that there may be many static outcomes to causes with variable effect, one could in essence apply the Murphy's Law approach to the logic factor, which would require a large sampling of similar static cause and effect scenarios, which would have been analyzed after the fact, and cataloged with both time and space conditions which may have or were determined to effect the effect. Therefore, even when I am presented with a specific problem scenario, prior to acting out a solution, I attempt to build in all the possible negative effects which may be a result of a proposed causalities effect. Even though there may be a logical true or false response to a specific cause and effect, the main issue is to avoid a cascade of effects, which are not controllable, because of a null-time factor. Therefore, logic can be designed to anticipate effects prior to the initial cause. This is a human intuitive process which would be difficult to assimilate into computational logic, although with the advent of faster processing and combined processors, in addition to faster and larger storage retrieval methods and hardware, should over time, be able to predict effects prior to cause.

-- Updated December 23rd, 2014, 5:09 pm to add the following --
Reactor wrote: I agree that some things “just are.” In my system, the attention is on what happens, dynamically. For example, this temporal operation is a primitive: “If (A first, then B is T), therefore (B first, then A is F).”
In a more specific response to Reactor's notation above, the following algorithm does seem to be a similar application.

Image

Flow chart of an algorithm (Euclid's algorithm) for calculating the greatest common divisor (g.c.d.) of two numbers a and b in locations named A and B. The algorithm proceeds by successive subtractions in two loops: IF the test B ≥ A yields "yes" (or true) (more accurately the number b in location B is greater than or equal to the number a in location A) THEN, the algorithm specifies B ← B − A (meaning the number b − a replaces the old b). Similarly, IF A > B, THEN A ← A − B. The process terminates when (the contents of) B is 0, yielding the g.c.d. in A. (Algorithm derived from Scott 2009:13; symbols and drawing style from Tausworthe 1977).

-- Updated December 23rd, 2014, 7:00 pm to add the following --
Reactor wrote: The Boolean operators can be combined with STORE, the memory operator, to form counters and storage registers, state-machines, arithmetic-logic units, microprocessors, and such.

When performed by physical logic elements, these operations are considered to be executed in a null-time zone. The evaluations are available at the next live moment (usually at the next clock pulse or instruction), which is designed to occur after any contributing settling times or gate-delays have run to completion.

Boolean logic used in such a manner is static, is unobservant of change, and can be said to inhabit the space-domain. The time-domain is an untapped resource.

It my opinion, all Boolean-sequential languages are sparse and are limited to the space-domain. They perform in the time domain at the user’s peril. We can talk about concurrent processing, but there are only linear-sequential processors at the bottom of the latest computational machine, no matter what it is called.

My system of reactive logic (RL) has 11 fundamental operators and 56 functions that perform in the space, time, and (joint) space-time domains. The RL language is not a computer language. (All computer languages have the limitations that are caused by the computational method.) RL can be used to design and construct machines that respond in parallel-concurrent fashion.
Reactor, while I was reviewing your statements above and where I responded in fashion where I was not sure of your inference, I have changed my mind on the issues presented above and have associated with my work with IBM where I primarily supported their legacy POS systems which were built on proprietary systems architecture, where in their early designs, only having what one today would consider as primal systems, like 286, 386, and 486 processors, they had an enormous amount of work to do and IBM was able to overcome many of these issues by having specific hardware and software developed which were more efficient and were, in my opinion, the most multitasking systems even available to date. It sounds like the issue you present above could have been resolved by downgrading hardware, similar to what Apple did with their iPhones and other devices. The architecture is called RISC processor (Reduced instruction set computing), which seems similar to your RL language scenario. However, IBM developed a processor which would handle multiple operating systems, and if this architecture where to be stacked like the current newer multiple processors, and isolated with multiple controllers, it would be conceivable to actually run multiple operating system through one processor. This way you could actually run OS's like Fortran and other proprietary OS's to handle numerous specific functions which would not be available which todays OS's, like Windows, Unix and Novell, etc. However, these RISC processors where designed to optimize and reduce the instruction sets in such a way as to minimize operations and increase functions. But, this did not address the multitasking ability or near multitasking effect which would require a more efficient OS. Therefore, they contracted Digital Research, now Novell, to design the FlexOS operating system, which is the most efficient system I have ever worked with. Under certain conditions the processor way always at red-line and we literally burned up more hard drives because they never stopped working. This OS use one main program which we called "Timer" which looped and paused at the end in order for all of the other sub-programs an opportunity to process, however this OS required specific memory in order to function which eliminated the need for memory stacks and registers, where the only way to get the OS to load on a PC it required NVRAM (Non-volatile random-access memory), which retained it memory even if the power was turned off, which allowed for faster reboot times and for loading and retention of logic algorithms or data pipes between remote PCs or other peripheral systems. As a mater of fact IBM attempted to compete with MS Windows with their introduction of OS/2 Warp, which really never took on, but was extremely efficient. There were methods used by the FlexOS system which sped up data retrieval for keyed files which used numeric access keys, which was called reverse notation, where these number keys where cataloged in revers because it is faster to look up and sort through databases in revers because other systems actually have to turns the search key numbers around and restore them in memory, then once found reverse the process, where the FlexOS system read and sent the data backwards. The reverse notation can be used in large data bases because the search keys are read from left to right but when stored in binary are read from right to left. The only problem we hard with this is that when we had to look for raw data on the hard drives, we had to reverse our entries.

So, your notation above reminded me of these old systems and in rereading your post I thought that the similarity your had described were similar to what I had worked with for so many years. Where, sometimes old is not bad just different, and simple some times will work better then complicated. As they say K.I.S.S..
The Reality of knowing what Wisdom is, is in the Experiencing of the Philosophy of using Knowledge.

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Re: Inabilities of computer logic

Post by Reactor » December 23rd, 2014, 10:10 pm

MidiChlorian,

My background is in engineering process control systems for discrete dynamic processes. Rather than take a statistical approach, my inclination is to provide a system that can monitor and control a given physical process within specified boundaries. We want to run these processes in a continuous manner, but stop when there is a problem in either the process being controlled, or the controller itself. This means keeping track of the sequence of process events that repetitively must occur in a specified order. The sensors, as well, to make sure there are no stuck-at faults. There are, generally, three species of control procedures: a) immediate stop for personnel safety, b) stop before tool engagement for equipment safety, and c) an alert on protection degradation or decreased redundancy. A fourth control procedure might call for an adjustment of some kind, perhaps for quality control purposes.

The order of operations is more important than how many micro- or milliseconds each op takes. We look for a missed event or one in the wrong order. In these types of processes, the occurrence of each event in the sequence is necessary, so one missing or in the wrong order means the process has gone bad and immediate action must be taken. One more machine cycle is an undesirable outcome, as it may produce a substandard article of manufacture that would then be mixed in with the good ones. Perhaps the machine could be damaged on the next cycle. It is better to stop the machine and fix what went wrong before continuing.

If there is a step in the manufacturing cycle that requires clock timing of some sort, that can be accommodated with a discrete “reset, time, detect and check” at the appropriate places in the cycle.

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Re: Inabilities of computer logic

Post by MidiChlorian » December 23rd, 2014, 11:25 pm

Reactor wrote:MidiChlorian,

My background is in engineering process control systems for discrete dynamic processes. Rather than take a statistical approach, my inclination is to provide a system that can monitor and control a given physical process within specified boundaries. We want to run these processes in a continuous manner, but stop when there is a problem in either the process being controlled, or the controller itself. This means keeping track of the sequence of process events that repetitively must occur in a specified order. The sensors, as well, to make sure there are no stuck-at faults. There are, generally, three species of control procedures: a) immediate stop for personnel safety, b) stop before tool engagement for equipment safety, and c) an alert on protection degradation or decreased redundancy. A fourth control procedure might call for an adjustment of some kind, perhaps for quality control purposes.

The order of operations is more important than how many micro- or milliseconds each op takes. We look for a missed event or one in the wrong order. In these types of processes, the occurrence of each event in the sequence is necessary, so one missing or in the wrong order means the process has gone bad and immediate action must be taken. One more machine cycle is an undesirable outcome, as it may produce a substandard article of manufacture that would then be mixed in with the good ones. Perhaps the machine could be damaged on the next cycle. It is better to stop the machine and fix what went wrong before continuing.

If there is a step in the manufacturing cycle that requires clock timing of some sort, that can be accommodated with a discrete “reset, time, detect and check” at the appropriate places in the cycle.
Reactor, what you have described, as far as process and procedural sequence, or order as you have mentioned is a very simple procedure. If there are quality sensors which monitor repetitive sequential procedures and even if in conjunction with an optical scanning device to revalidate manual mechanical motion sequences, the procedures logic can be validated and create a checksum validation sequence number which will determine valid completion of if a multiple process, can register within the checksum specific non-completion values within each process. Thereby a properly completed procedure will or should always return a specific checksum, if not the invalid checksum will or can set a stop function and also indicate the exact place of error or non-validated set within the process. Now in a closed system where repetitive steps or machines are responsible for a specific but unique process, each machine has its own processors which are link via a closed network, most likely on a loop type adapter system where there is a constant rotating signal linked to a controller processor, or if using other networking types where a program pipe links each separate sub-controller together, which literally has an open link with the main controller which controls the main process sequence. At any point if a subnormal checksum is returned a stop function can be issued. Now if one sub-process is dependent on another previous sub-process, where its proper completion is necessary before continuation, then the previous sub-process checksum would be a requirement before initiation of the next process, where a negative checksum stops all subsequent processes. This same type of process is a t work in the humans neural network, through the nervous system, where each neuron generates its own charge dependent on the previous neurons signal. So, this should not be an issue, even if there are multiple controllers involved, however if there is an assembly line process involved, it would be most dependent on the accuracy of sensors performing the validation process.
The Reality of knowing what Wisdom is, is in the Experiencing of the Philosophy of using Knowledge.

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Re: Inabilities of computer logic

Post by Reactor » December 24th, 2014, 4:01 pm

MidiChlorian,

It is time for a demonstration. Below is a reactive logic specification for a machine controller that runs a physical process on a particular machine.

Punch Press Monitor-Controller

A RUN condition will be synthesized from the signals generated by the sensors and switches on a variable-speed, continuous-strip punch press and the process it performs. The RUN condition will be output from a process monitor-controller and will enable initial or continued machine operation only while proper process signals occur. The controller stops the machine upon receiving improper signals. If the fault can be corrected, the controller can be reset and the machine will be able to be restarted by the operator. In the cycle, “0” degrees is TDC (top dead center), 180 degrees is BDC (bottom dead center).

(The included diagram was stripped out of the text, but you may obtain it via email request to reactor@reeactivesystems.com

This is a simple punch press operation cycle in which process events that occur at the approximate shaft angles of the main crankshaft that moves the punch up toward 0 degrees to allow the material strip, usually stainless steel, to feed into the die, and down toward 180 degrees to cause the punch to impinge upon and through the metal strip to form and punch the parts carried along on the strip as they are progressively formed. The end station on the punch and die set cuts the completed part off the strip.

The input signals to the monitor/controller are grouped in three categories: 1) Repetitive signals, once each cycle at approximately the degrees given: “a” at 60°, “b” at 220°, “c” at 270°, “d” at 10°, and “e” at 30°; 2) Constant signals “f” and “g”; and 3) Conditional signals “PB” (external), “TD” and “MR” (internally generated).

The process statement is: “This is the reactive logic specification of a punch-press malfunction detector in which a RUN output condition (T = 1, F = 0) is comprised of the mandatory conditions and event sequences of: either RUN or manual reset (MR) being asserted; and for as long as each occurrence of e is followed by one complete and ordered sequence of A first, followed by b, followed by c, followed by d, and that only if during the constant condition G; and for as long as a and e occur alternately, in the same order, and separately without overlap, and that only if during the constant condition F.”

“In the same controller, other permissively concurrent operations take place, including: the assertion of /TD 0.01 second after RUN begins; the cessation of /TD 60 seconds after RUN ends; the assertion of MR if /TD has ended and the push-button is pressed (PB is asserted); the assertion of A, if a is present and at the same time neither b, nor c, nor d is present; /F is set by the momentary loss of f; F is reset if both f and MR are true at the same time; /G is set by the momentary loss of g; G is reset if both g and MR are true at the same time; and e resets the remaining cyclic functions.”

The English language specification, with its temporal qualifiers, can be translated directly “by hand,” or automatically, into a functional RL process statement. This is accomplished in a one-for-one manner, is straight-forward, and is easily checked for correspondence between the specification and the RL process statement.

RUN = { ( RUN + MR ) • { e, [ ( A, b, c, d ) • G ] ; } • [ ( a, e: ) • F ] } WHILE [ ( ‘RUN, 0.01 sec’ ) # /TD]

WHILE [ ( RUN’, 60 sec’ ) # TD ] WHILE [ ( TD • PB ) = MR ] WHILE [ A = ( a • /b • /c • /d ) ]

WHILE ( /f # /F ) WHILE [ ( f • MR ) # F ] WHILE ( /g # /G ) WHILE [ ( g • MR ) # G ]

WHILE { e = [ r (A, b) • r (b, c) • r (c, d ) ] }

The above RL statement is the complete set of directions to select, arrange, and connect all the RL hardware logic elements necessary to construct the specified real time, parallel-concurrent, autonomous controller. The core logic for this autonomous punch-press controller requires less than 100 equivalent gates (2-input NAND or NOR). Event precedence discrimination is less than one gate-delay, implemented in any choice of logic device technology. A few analog components are required to provide the time delays. The controller monitors 8 external inputs and two internal conditions at all times (no sampling). It concurrently detects the events and conditions of the stamping process for proper sequences and states, including checking its own operation and all cyclic inputs on every cycle for possible circuit malfunction, shorts, or opens, including stuck-at faults. Any signal in the wrong order, an improper condition, or a continuous short or open on any cyclic input will cause the single RUN output to cease, causing the punch-press to stop.

Implementation of the same controller in the conventional technology would require a microprocessor and memory comprised of thousands of equivalent gates, and hundreds to thousands of lines of code (software), and would not function in parallel-concurrent real time. Notably, in RL, there can be one continuous line of symbolic expression for the whole process, which indicates the entire process statement is in force at any and all times, awaiting only the occurrence of the relevant input events and internal conditions.

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